Initialization-Based Test Pattern Generation for Asynchronous Circuits
| dc.contributor.author | Efthymiou, A. | en |
| dc.date.accessioned | 2015-11-24T17:02:18Z | |
| dc.date.available | 2015-11-24T17:02:18Z | |
| dc.identifier.issn | 1063-8210 | - |
| dc.identifier.uri | https://olympias.lib.uoi.gr/jspui/handle/123456789/11037 | |
| dc.rights | Default Licence | - |
| dc.subject | asynchronous circuits | en |
| dc.subject | automatic test pattern generation (atpg) | en |
| dc.subject | sequential initialization | en |
| dc.subject | stuck-at fault testing | en |
| dc.subject | sequential-circuits | en |
| dc.subject | testability | en |
| dc.title | Initialization-Based Test Pattern Generation for Asynchronous Circuits | en |
| heal.abstract | A novel test pattern generation method for asynchronous circuits is described and evaluated in detail. The method combines conventional pattern generation with hazard-free state initialization. Any type of asynchronous circuit can be processed, and all stuck-at faults, even those inside state-holding elements, such as C-elements, are considered. The results on some of the largest benchmarks ever used for asynchronous circuit testing show fault coverage on the order of 99% with no area overhead for (quasi-) delay-insensitive datapath circuits. | en |
| heal.access | campus | - |
| heal.fullTextAvailability | TRUE | - |
| heal.identifier.primary | Doi 10.1109/Tvlsi.2009.2013470 | - |
| heal.journalName | Ieee Transactions on Very Large Scale Integration (Vlsi) Systems | en |
| heal.journalType | peer reviewed | - |
| heal.language | en | - |
| heal.publicationDate | 2010 | - |
| heal.recordProvider | Πανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής | el |
| heal.type | journalArticle | - |
| heal.type.el | Άρθρο Περιοδικού | el |
| heal.type.en | Journal article | en |
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