An efficient hardware design for rejecting common mode in a group of adjacent channels of silicon microstrip sensors used in high energy physics experiments

dc.contributor.authorManthos, N.en
dc.contributor.authorSidiropoulos, G.en
dc.contributor.authorVichoudis, P.en
dc.date.accessioned2015-11-24T18:33:03Z
dc.date.available2015-11-24T18:33:03Z
dc.identifier.issn0018-9499-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/16680
dc.rightsDefault Licence-
dc.titleAn efficient hardware design for rejecting common mode in a group of adjacent channels of silicon microstrip sensors used in high energy physics experimentsen
heal.abstractAlgorithms have been studied using Monte Carlo techniques and implemented in a fast Xilinx Virtex II pro field programmable gate array (FPGA), in order to calculate and remove, after pedestal subtraction, the common mode of a group of adjacent channels. The implementation of the algorithms has been optimized both for speed and minimal FPGA resources, so as to be used in multi-channel applications. The aim of this work is to define the optimum algorithm for common mode calculation to be implemented for common mode rejection in the CMS Preshower detector.en
heal.accesscampus-
heal.fullTextAvailabilityTRUE-
heal.identifier.secondary<Go to ISI>://WOS:000238581900068-
heal.identifier.secondaryhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=1644987-
heal.journalNameIeee Transactions on Nuclear Scienceen
heal.journalTypepeer reviewed-
heal.publicationDate2006-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Επιστημών και Τεχνολογιών. Τμήμα Βιολογικών Εφαρμογών και Τεχνολογιώνel
heal.typejournalArticle-
heal.type.elΆρθρο Περιοδικούel
heal.type.enJournal articleen

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