Timing error detection and correction by time dilation
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Date
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Floros, A.
Tsiatouhas, Y.
Kavousianos, X.
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Springer Berlin Heidelberg
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VLSI-SoC: Design Methodologies for SoC and SiP
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-
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en
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271-285 σ.
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Πανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Η/Υ & Πληροφορικής
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Βιβλιογραφία: σ. 284-285