Power management in the Amulet microprocessors

dc.contributor.authorFurber, S. B.en
dc.contributor.authorLloyd, D. W.en
dc.contributor.authorEfthymiou, A.en
dc.contributor.authorLewis, M. J. G.en
dc.contributor.authorGarside, J. D.en
dc.contributor.authorTemple, S.en
dc.date.accessioned2015-11-24T17:00:05Z
dc.date.available2015-11-24T17:00:05Z
dc.identifier.issn0740-7475-
dc.identifier.urihttps://olympias.lib.uoi.gr/jspui/handle/123456789/10703
dc.rightsDefault Licence-
dc.titlePower management in the Amulet microprocessorsen
heal.abstractAmulet microprocessors are asynchronous (clockless) implementations of the ARM 32-bit RISC architecture. Their asynchronous control framework has positive benefits for low-power applications because it reduces activity to the minimum required to perform a task, whereas a clock inevitably incurs wasteful activity.en
heal.accesscampus-
heal.fullTextAvailabilityTRUE-
heal.journalNameIeee Design & Test of Computersen
heal.journalTypepeer reviewed-
heal.languageen-
heal.publicationDate2001-
heal.recordProviderΠανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικήςel
heal.typejournalArticle-
heal.type.elΆρθρο Περιοδικούel
heal.type.enJournal articleen

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