A CAM with mixed serial-parallel comparison for use in low energy caches
| dc.contributor.author | Efthymiou, A. | en |
| dc.contributor.author | Garside, J. D. | en |
| dc.date.accessioned | 2015-11-24T17:00:38Z | |
| dc.date.available | 2015-11-24T17:00:38Z | |
| dc.identifier.issn | 1063-8210 | - |
| dc.identifier.uri | https://olympias.lib.uoi.gr/jspui/handle/123456789/10794 | |
| dc.rights | Default Licence | - |
| dc.subject | asynchronous design | en |
| dc.subject | content-addressable memory | en |
| dc.subject | low-power design | en |
| dc.title | A CAM with mixed serial-parallel comparison for use in low energy caches | en |
| heal.abstract | A novel, low-energy content addressable memory (CAM) structure is presented which achieves an approximately four-fold improvement in energy per access, compared to a standard parallel CAM, when used as tag storage for caches. It exploits the address patterns commonly found in application programs, where testing the four least significant bits of the tag is sufficient to determine over 90% of the tag mismatches; the proposed CAM checks those bits first and evaluates the remainder of the tag only if they match. Although, the energy savings come at the cost of a 25% increase in search time, the proposed CAM organization also supports a parallel operating mode without a speed loss but with reduced energy savings. | en |
| heal.access | campus | - |
| heal.fullTextAvailability | TRUE | - |
| heal.identifier.primary | Doi 10.1109/Tvlsi.2004.824298 | - |
| heal.journalName | Ieee Transactions on Very Large Scale Integration (Vlsi) Systems | en |
| heal.journalType | peer reviewed | - |
| heal.language | en | - |
| heal.publicationDate | 2004 | - |
| heal.recordProvider | Πανεπιστήμιο Ιωαννίνων. Σχολή Θετικών Επιστημών. Τμήμα Μηχανικών Ηλεκτρονικών Υπολογιστών και Πληροφορικής | el |
| heal.type | journalArticle | - |
| heal.type.el | Άρθρο Περιοδικού | el |
| heal.type.en | Journal article | en |
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